kdf: Avoid redundant memcpy()
Register DCO for Gary Lin
There's GCRYPT_IN_ASAN_TEST environment variable check in tests/t-secmen.c and tests/t-sexp.c. Are those check needed after this change? Could they be removed?
const-time: add 64-bit fast paths for const-time buffer functions
Add stack burning for PQC algorithms
mceliece6688128f: use const-time helper for memory comparison
mceliece6688128f: harden mask generation against branch optimization
sntrup761: use const-time helpers for memory comparison and cond move
kyber: harden mask generation against branch optimization
sntrup761: harden mask generation against branch optimization
mpih-pow: harden condition calculation against branch optimization
mceliece6688128f: fix stack overflow crash on win64/wine
rijndael: harden mask generation against branch optimization
cipher-xts: harden mask generation against branch optimization
t-kem: add info print for each algoritm
hwfeatures: restore "intel-fast-vpgather" as dummy entry
mceliece6688128f: fix UBSAN runtime errors
hwf-x86: remove unused HWF_INTEL_FAST_VPGATHER
configure.ac: perform RISC-V vector crypto intrinsics bug checks without LTO
t-kem: fix test loop iteration
hwfeature: fix "riscv-zvkg" HW feature mapping
cipher-gcm-riscv-zbb-zbc: add POLYVAL acceleration
Require RISC-V B extension for vector intrinsics implementations
Add RISC-V Zbb+Zbc implementation of CRC
Add RISC-V vector cryptography implementation of GHASH
riscv: always use -mstrict-align for vector intrinsic implementations
Add RISC-V vector cryptography implementation of AES
Add RISC-V vector cryptography implementations of SHA256 and SHA512
bithelp: fix __riscv_zbb check for _gcry_ctz_no_zero
configure.ac: deduplicate intrinsics test code
crc-intel-pclmul: add AVX2 and AVX512 code paths
poly1305-p10le: use '.rodata' section for read-only data
Add missing machine tags for PowerPC assembly
Add missing abiversion tag for PowerPC assembly
Ok, thanks. I pushed the powerpc patches to master.
I tested Ubuntu's version of GCC-15 (powerpc64le cross-compiler) and did not see this build failure:
blake2s-avx512: mark merged load as such
blake2s-avx512: remove duplicate load
Fix missing simd-common-riscv.h in libgcrypt tarball.
tests: Fix link errors for t-thread-local.
cipher:aria: Fix compiler error on NetBSD.
Register DCO for Collin Funk
mpi/ec-nist: fix NIST-P224 failing on 32-bit architectures
t-mpi-point: fix test failing in FIPS mode
mpih-const-time: fix return value for _gcry_mpih_cmp_ui
mpi/longlong: prevent optimization of carry instructions to branches
mpih-const-time: avoid branches in _gcry_mpih_cmp_ui
chacha20: add RISC-V vector intrinsics implementation
Add SHA3 acceleration for RISC-V Zbb extension
Add GHASH RISC-V Zbb+Zbc implementation
Add RISC-V vector permute AES
bithelp: add count trailing zero bits variant for RISC-V
hwf: add detection of RISC-V (64-bit) hardware features
Add vector register clearing for PowerPC implementations
rijndael-ppc: fix 'may be used uninitialized' warnings
salsa20-amd64: clear vectors registers
whirlpool-sse2-amd64: clear vectors registers
camellia-aarch64-ce: clear volatile vectors registers
sm3-aarch64-ce: clear volatile vector registers
gcm-aarch64-ce: clear volatile vector registers at setup function
sm4-aarch64-ce: clear volatile vector registers
sm4-aarch64-sve: clear volatile vectors registers
sm4-aarch64: clear volatile vectors registers
sm4-aarch64-sve: add missing .text section
Add AES Vector Permute intrinsics implementation for AArch64
Add GHASH AArch64/SIMD intrinsics implementation
Thanks. Test works in my nightly builds now.
camellia-aarch64: do not store/load link register to/from stack
Add PAC/BTI support for AArch64 assembly
Do not build 32-bit ARM assembly on Aarch64
mpi/ec-inline: reduce register pressure on 32-bit ARM
Do you have any way to test PAC/BTI on actual HW that support these extensions?
This excludes 32-bit ARM assembly from Aarch64 builds:
This patch should fix the issue:
Ok, so aarch64 assembly would need PAC and BTI support. As far as I have understood these, is that PAC instructions are not needed with current assembly as none of those is storing/loading LR register (all aarch64 assembly functions are leaf functions). So only BTI is needed and that is basically same modification as CET on x86.
Add CET support for i386 assembly
Add CET support for x86-64 assembly
Do not build amd64 assembly on i386
Do not build i386 assembly on x86-64
asm-common-amd64: add missing CFI directives for large memory model code
"rijndael-vaes-avx2-i386.S" should not be build for x86-64 but until now that has not had any affect as #ifdefs in that source file result empty object file on x86-64.
Here's patches for adding CET support to x86-64 and i386 assembly.
OpenBSD carries libgcrypt patch for CET which adds endbr64 instruction to CFI_STARTPROC() macro in "asm-common-amd64.h". We could do the same and also add endbr32 to i386 too. That would be easiest way to add required endbr instructions. OpenBSD also has patch for arm64 to add similar BTI instructions to aarch64 variant of CFI_STARTPROC.
There is -O flag munging for "tiger.o" in "cipher/Makefile.am", an old workaround for broken compiler I think. IMHO tiger.o case can and should be removed.
OpenBSD carries libgcrypt patch for CET which adds endbr64 instruction to CFI_STARTPROC() macro in "asm-common-amd64.h". We could do the same and also add endbr32 to i386 too. That would be easiest way to add required endbr instructions. OpenBSD also has patch for arm64 to add similar BTI instructions to aarch64 variant of CFI_STARTPROC.
random:cipher: handle substitution in sed command
mpi/generic: use longlong.h for carry handling
chacha20-ppc: fix implicit conversion between vector types warnings
rijndael-p10le: silence incorrect GCC cast alignment warning
chacha20-ppc: silence GCC cast alignment warning
src/hwf-x86: disable inline assembly CFI directivies for WIN32